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Method for capping copper in semiconductor devices

Patent 5447887 Issued on September 5, 1995. Estimated Expiration Date: Icon_subject April 1, 2014. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.

Patent References

Method of producing semiconductor device Patent #: 4910169
Issued on: 03/20/1990
Inventor: Hoshino

Inventors

Assignee

Application

No. 222759 filed on 04/01/1994

US Classes:

438/644, Having adhesion promoting layer257/E21.591, Modifying pattern or conductivity of conductive members, e.g., formation of alloys, reduction of contact resistances (EPO)438/651, Silicide438/672, Plug formation (i.e., in viahole)438/680, Utilizing chemical vapor deposition (i.e., CVD)438/687Copper of copper alloy conductor

Examiners

Primary: Chaudhuri, Olik
Assistant: Everhart, C.

Attorney, Agent or Firm

Foreign Patent References

  • 4192527 JP. 07/21/1992

International Classes

H01L 021/44
H01L 021/48

Abstract

A silicon nitride layer (34) has improved adhesion to underlying copper interconnect members (30) through the incorporation of an intervening copper silicide layer (32). Layer (32) is formed in-situ with a plasma enhanced chemical vapor deposition (PECVD) process for depositing silicon nitride layer (34). To form layer (32), a semiconductor substrate (12) is provided having a desired copper pattern formed thereon. The copper pattern may include copper interconnects, copper plugs, or other copper members. The substrate is placed into a PECVD reaction chamber. Silane is introduced into the reaction chamber in the absence of a plasma to form a copper silicide layer on any exposed copper surfaces. After a silicide layer of a sufficient thickness (for example, 10 to 100 angstroms) is formed, PECVD silicon nitride is deposited. The copper silicide layer improves adhesion, such that silicon nitride layer is less prone to peeling away from underlying copper members.

Other References

  • Hymes, S., et al. "Passivation of Copper by Silicide de Formation in dilute Silane" J. Appl. Phys. 71(9) pp. 4623-4625 (1 May 1992), (abstract)
  • B. Rogers, et al. "Issues in a Submicron Cu Interconnect System" 1991 Proc. 8th International IEEE VLSI multilevel Interconnect Conf. (Jun. 11-12, 1991)
  • Chin-An Chang et al., "Reaction between Cu and TiSi2 across different barrier layers", Appl. Phys. Lett. vol. 57, No. 6, Aug. 6, 1990 American Institute of Physic, pp. 617-619
  • A. Cros et al., "Formation, oxidation, electronic and electrical properties of copper silicides", J. Appl. Phys., vol. 67, No. 7, Apr. 1, 1990, pp. 3328-3336
  • B. Luther et al., "Planar Copper-Polyimide Back End Of The Line Interconnections For ULSI Devices", Jun. 8-9, 1993 VLSI Multilevel Interconnect Conference, pp. 15-20
  • James S. H. Cho et al., "Reliability of CVD Cu Buried Interconnections", 1993 IEEE/IEDM, pp. 265-267
  • Yasuo Takahashi et al., "New platinum sillicide formation method using reaction between platinum and silane", J. Appl. Phys. vol. 58, No. 8, Oct. 15, 1985, 1985 American Institute of Physics, pp. 3190-319
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