Analog-digital converter with distributed sample-and-hold circuit
December 28, 2013. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.Patent References 3710377 Analog to digital converter utilizing a quantizer network Parallel analog-to-digital converter using 2.sup.(n-1) comparators 5117227 A/D convertor of the pipeline type having additional comparators for use in setting a specified reference voltage Serial-parallel type analogue/digital converter Pipelined A/D converter Analog-to-digital conversion method and device Patent #: 5321402 InventorAssigneeApplicationNo. 174419 filed on 12/28/1993US Classes:341/156, Coarse and fine conversions341/159Parallel typeExaminersPrimary: Hoff, Marc S.Attorney, Agent or FirmForeign Patent References
International ClassH03M 001/14Foreign Application Priority Data1992-12-30 FRAbstractThe disclosure relates to analog-digital converters. It is sought to limit the power consumption and obtain a better compromise among the different performance characteristics of the computer. In a general structure of a converter there are, firstly, a coarse converter for the most significant bits and, secondly, a fine converter for the least significant bits. One of them, generally, the fine converter, has differential amplifiers [AD(1) to AD(N)]receiving the voltage to be converted (Ve) and a reference voltage. It is proposed to place sample-and-hold circuits [EB(1) to EB(N)] at output of these differential amplifiers and to eliminate the sample-and-hold circuit that is often placed upline with respect to these amplifiers.Other References
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