Low temperature oxide layer over field implant mask
May 2, 2014. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.Patent ReferencesMethod for manufacturing complementary insulated gate field effect transistors Process for making CMOS field-effect transistors Suppression of parasitic sidewall transistors in locos structures Method for fabricating improved complementary metal oxide semiconductor devices Micron and submicron patterning without using a lithographic mask having submicron dimensions Method for increasing source/drain to channel stop breakdown and decrease P+/N+ encroachment Diffused field CMOS-bulk process and CMOS transistors Monolithically integrated semiconductor device containing bipolar junction transistors, CMOS and DMOS transistors and low leakage diodes and a method for its fabrication Method of eliminating bird's beaks when forming field oxide without nitride mask Complementary, isolated DMOS IC technology InventorsApplicationNo. 236299 filed on 05/02/1994US Classes:438/448, Utilizing oxidation mask having polysilicon component257/E21.258, Using masks (EPO)257/E21.557, Introducing electrical active impurities in local oxidation region solely for forming channel stoppers (EPO)257/E21.696, Bipolar and MOS technologies (EPO)438/449Dopant additionExaminersPrimary: Hearn, Brian E.Assistant: Dang, Trung Attorney, Agent or FirmInternational ClassH01L 021/76AbstractA thin base oxide is disposed over both an active area and also over a field area of a substrate. A thin silicon-nitride layer is then formed over the base oxide in the active area to protect the underlying substrate from oxygen and/or water vapor during a subsequent field oxidation step. This thin nitride layer is, however, insufficiently thick to serve as a field implant mask in a subsequent field implant step. An additional low temperature oxide (LTO) layer is therefore provided over the nitride layer in the active area. The field implant step is then performed using the base oxide, the thin nitride, and the overlying LTO as a field implant mask. The boundaries of the overlying LTO define a field implant boundary. After the field implant step but before the field oxidation step, the LTO layer is removed from the top of the thin nitride layer. As a result, only the base oxide and the thin nitride layer is disposed over the active area during field oxidation. Therefore, in comparison to previous methods using thicker nitride layers, the present invention employs a thin nitride layer during the field oxidation step, thereby reducing the amount of stress induced in the nitride layer and thereby minimizing problems associated with thick nitride layers such as the introduction of lattice defects into the underlying silicon substrate. The thin nitride process of the present invention may, for example, be incorporated into a BiCDMOS process.Other References
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