Patent ReferencesPower on reset pulse generating circuit sensitive to rise time of the power supply Method of and apparatus for reducing current of semiconductor memory device Semiconductor integrated circuit device NMOS transistor having inversion layer source/drain contacts Semiconductor memory with power-on reset controlled latched row line repeaters Circuit having charge compensation and an operation method of the same Power-on-reset circuit including integration capacitor Power on reset circuit for semiconductor integrated circuit device Dynamic random access memory device capable of performing test mode operation and method of operating such memory device Circuit for decreasing current consumption in data output circuit in case one of two supply voltages fails InventorApplicationNo. 151721 filed on 11/15/1993US Classes:327/530, With specific source of supply or bias voltage327/198, Initializing, resetting, or protecting a steady state condition327/535, Having stabilized bias or power supply level365/189.09, Including reference or bias voltage generator365/226POWERINGExaminersPrimary: Callahan, Timothy P.Assistant: Phan, Trong Attorney, Agent or FirmForeign Patent References
International ClassesG05F 001/10H03K 003/02 G11C 007/00 Foreign Application Priority Data1990-07-31 JPAbstractDisclosed is a DRAM including a power-on reset signal generating circuit for outputting a voltage of a predetermined level for a definite period by utilizing a rise of an external supply voltage, and a supply voltage conversion circuit for lowering the external supply voltage to a constant voltage. In this DRAM, the power-on reset signal generating circuit is driven by the external supply voltage not an output voltage of the supply voltage conversion circuit. The output voltage of the supply voltage conversion circuit is applied to various internal circuits including smaller-scale MOS transistors, to drive these internal circuits. Since the supply voltage conversion circuit often includes circuit components with a large time constant in order to decrease power consumption, the output voltage of the supply voltage conversion circuit rises rather slowly than the external supply voltage. However, the power-on reset signal generating circuit receives the external supply voltage as a driving voltage and hence immediately outputs a normal one-shot pulse in response to the supply of power to the DRAM.Other References
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