Patent ReferencesSelf-aligned metal process for field effect transistor integrated circuits using polycrystalline silicon gate electrodes Method of fabricating a submicron silicon gate MOSFETg21 which has a self-aligned threshold implant Process for forming a feature on a substrate without recessing the surface of the substrate NMOS transistor having inversion layer source/drain contacts Method of fabricating MOS transistors using selective polysilicon deposition Self-aligned overlap MOSFET and method of fabrication Method of producing insulated-gate field effect transistor Method of fabricating semiconductor device having sidewall spacers and oblique implantation Large angle ion implantation method Patent #: 5223445 Inventors
ApplicationNo. 288332 filed on 08/10/1994US Classes:438/300, Having elevated source or drain (e.g., epitaxially formed source or drain, etc.)257/E21.43, Recessing gate by adding semiconductor material at source (S) or drain (D) location, e.g., transist or with elevated single crystal S and D (EPO)257/E21.434, With initial gate mask or masking layer complementary to prospective gate location, e.g., with dummy source and drain contacts (EPO)257/E29.04, Of field-effect transistors with insulated gate (EPO)257/E29.051, With insulated gate (EPO)257/E29.135, Characterized by length or sectional shape (EPO)438/302, Oblique implantation438/303, Utilizing gate sidewall structure438/305Plural doping stepsExaminersPrimary: Hearn, Brian E.Assistant: Dang, Trung Attorney, Agent or FirmInternational ClassH01L 021/265AbstractA method for forming narrow length transistors by forming a trench in a first layer over a semiconductor substrate. Spacers are then formed within the trench and a gate dielectric is formed between the spacers at the bottom of the trench on the semiconductor substrate. The trench is then filled with a gate electrode material which is chemically-mechanically polished back to isolate the gate electrode material within the trench, and the first layer is removed leaving the gate dielectric, gate electrode and spacers behind.Other References
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