Ring oscillator having selectable number of inverter stages

Patent 5418499 Issued on May 23, 1995. Estimated Expiration Date:

July 12, 2014. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.

Abstract Claims Description Full Text

Patent References

Programmable ring oscillator
Patent #: 4517532
Issued on: 05/14/1985
Inventor: Neidorff

Programmable voltage controlled ring oscillator
Patent #: 4978927
Issued on: 12/18/1990
Inventor: Hausman, et al.

Oscillation circuit including a ring oscillator having a changeable number of inverter circuits Patent #: 5331294
Issued on: 07/19/1994
Inventor: Watanabe, et al.

Inventor

Nakao, Kenji

Application

No. 274100 filed on 07/12/1994

US Classes:

331/57, RING OSCILLATORS331/177R, WITH FREQUENCY ADJUSTING MEANS331/179Step-frequency change (e.g., band selection, frequency-shift keying)

Examiners

Primary: Grimm, Siegfried H.

Attorney, Agent or Firm

Oblon, Spivak, McClelland, Maier & Neustadt

International Class

H03K 003/354

Foreign Application Priority Data

1993-08-31 JP

Abstract

A ring oscillator wherein an inverter group includes five inverters (G1 to G5) connected in series, the output of the inverter (G3) is connected to the input of the first inverter (G1) through a transfer gate (TF1), and the output of the inverter (G5) is connected to the input of the inverter (G1) through a transfer gate (TF2). The ring oscillator is adapted such that, when a switching signal (S3) is "L", the CMOS transfer gates (TF1) and (TF2) are on and off, respectively, and the three inverters (G1 to G3) are connected in a loop whereas the inverters (G4, G5) function as buffers receiving the output of the inverter (G3), to provide an oscillation signal (S2) produced by the three inverters (G1 to G3) forming the loop from an output terminal (2) and such that, when the switching signal (S3) is "H", the oscillation signal (S2) produced by the five inverters (G1 to G5) forming the loop is provided, whereby the oscillation signal has a wide range of variable oscillation frequency bands.