Method and apparatus for down-loading instructions from a host computer system to a memory in a peripheral controller for execution by a core microprocessor in the peripheral controller
October 13, 2013. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.Patent ReferencesCo-processor combination Co-processor combination System for arbitrating use of I/O bus by co-processor and higher priority I/O units in which co-processor automatically request bus access in anticipation of need Multiprocessor system Peripheral device interface and controller System for loading initial program loader routine into secondary computer without bootstrap ROM Communications controller interface Patent #: 4945473 InventorsApplicationNo. 136467 filed on 10/13/1993US Classes:717/173, Including downloading703/25, I/O adapter (e.g., port, controller)713/1DIGITAL DATA PROCESSING SYSTEM INITIALIZATION OR CONFIGURATION (E.G., INITIALIZING, SET UP, CONFIGURATION, OR RESETTING)ExaminersPrimary: Harrell, Robert B.Attorney, Agent or FirmForeign Patent References
International ClassG06F 013/12AbstractA method and apparatus for downloading instructions and other information to a peripheral controller for use in an Industry Standard Architecture (ISA) compatible computer provides a system which downloads instructions from the ISA compatible computer to an random access memory (RAM) accessible by the peripheral controller. The peripheral controller then executes these instructions to emulate the functions of conventional INTEL 8042 and 8742 series integrated circuits. The peripheral controller also provides other features not provided by the conventional 8042 or 8742 by executing other downloaded instructions located in the RAM.Other References
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