Abstract

A novel single chip microcomputer comprises a bus, a random access memory connected to the bus, a read only memory, a peripheral interface, a central processing unit taking a hold state according to a hold request signal transmitted from an external device outside the microcomputer, an interrupt controller receiving an interrupt request signal and then delivering an interrupt process request signal to the central processing unit, and a control unit. The control means receives an interrupt request signal from an external device and then delivers both an interrupt process request signal and a hold release signal to the central processing unit to release the central processing unit from the hold state. Subsequently, the control means synchronizes with an interrupt acknowledge signal from the central processing unit and delivers a vectored interrupt through the bus to the central processing unit so that the central processing unit executes an interrupt servicing program until the control means receives an interrupt process complete signal from the central processing unit.