Configuration data loopback in a bus bridge circuit
Patent 5379384 Issued on January 3, 1995. Estimated Expiration Date: 
September 23, 2013. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.
September 23, 2013. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.Patent ReferencesBus adapter module for interconnecting busses in a multibus computer system Transfer control equipment Duplex data processing system with programmable bus configuration Bus adapter unit for digital processing system Bus arbitration system for concurrent use of a system bus by more than one device Patent #: 5083260 InventorApplicationNo. 126111 filed on 09/23/1993US Classes:710/312Multiple bridgesExaminersPrimary: Harvey, Jack B.Assistant: Auve, Glenn A. Attorney, Agent or FirmInternational ClassG06F 013/38AbstractA method and apparatus for reducing cost and complexity of devices in a bus bridge circuit by dividing address and data paths between separate devices to reduce pin count, and by looping back "bridged" configuration data to access configuration registers. The host bridge circuit "bridges" all I/O accesses received over a host bus directly to a peripheral component bus without any decoding. The CDC is both initiator and target on the peripheral component bus for I/O access cycles generated by the host bridge circuit that are targeted for a host bridge configuration register. | |
