Thermally conductive integrated circuit package with radio frequency shielding
Patent 5371404 Issued on December 6, 1994. Estimated Expiration Date: 
February 4, 2013. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.
February 4, 2013. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.Patent References 2967984 3280019 3439255 3564109 3777221 Integrated circuit arrangement with means for avoiding undesirable capacitive coupling between leads IC Package with heat sink and minimal cross-sectional area Semiconductor die bonding with conductive adhesive Semiconductor resin package structure Semiconductor device mounted upon an insulating adhesive with silicon dioxide and nickel chromium steel filling particles InventorsAssigneeApplicationNo. 013391 filed on 02/04/1993US Classes:257/659, WITH SHIELDING (E.G., ELECTRICAL OR MAGNETIC SHIELDING, OR FROM ELECTROMAGNETIC RADIATION OR CHARGED PARTICLES)257/778, Flip chip257/786, Configuration or pattern of bonds257/787, ENCAPSULATED257/792, Including polyimide257/795, With specified filler material257/796, With heat sink embedded in encapsulant257/E23.067, Via connections through substrates, e.g., pins going through substrate, coaxial cables (EPO)257/E23.068, Additional leads joined to metallizations on insulating substrate, e.g., pins, bumps, wires, flat leads (EPO)257/E23.069, Spherical bumps on substrate for external connection, e.g., ball grid arrays (BGA) (EPO)257/E23.104, Characterized by shape of housing (EPO)257/E23.114, Protection against radiation, e.g., light, electromagnetic waves (EPO)257/E23.181, Characterized by shape of container or parts, e.g., caps, walls (EPO)361/690, Air361/704Thermal conductionExaminersPrimary: Jackson, JeromeAssistant: Arroyo, T. M. Attorney, Agent or FirmForeign Patent References
International ClassesH01L 049/00H01L 023/28 H01L 023/48 H01L 029/40 AbstractA semiconductor device package comprises a substrate (10), a flip-chip (16), an underfill adhesive (25), and a thermally and electrically conductive plastic material (20). A leadless circuit carrying substrate has a metallization pattern (13) on a first side (15), one portion of the metallization pattern being a circuit ground (17). The second side has an array of surface mount solder pads (24) electrically connected to the metallization pattern by means of at least one conductive via (26) through the substrate. A semiconductor device (16) is flip-chip mounted to the metallization pattern by means of metal bumps (22). An underfill adhesive (25) fills the gap between the semiconductor device and the substrate. A thermally and electrically conductive plastic material (20) containing metal particles is transfer molded to encapsulate the semiconductor device, the underfill adhesive, and a portion of the first side of the leadless circuit carrying substrate, forming a cover. The conductive plastic material is electrically connected to the circuit ground to shield the semiconductor device from radio frequency energy, and is mechanically attached to the semiconductor device to dissipate heat. Fins (28) may be molded into the conductive plastic material to further enhance the ability to dissipate heat. | |
