Apparatus and method for automatically testing computing equipment

Patent 5353240 Issued on October 4, 1994. Estimated Expiration Date:

March 22, 2013. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.

Abstract Claims Description Full Text

Patent References

Method of and apparatus for testing of mass-produced articles
Patent #: 4275451
Issued on: 06/23/1981
Inventor: Balzarini , et al.

Microprocessor reset with power level detection and watchdog timer
Patent #: 4586179
Issued on: 04/29/1986
Inventor: Sirazi , et al.

Reset signal generating circuit Patent #: 5157270
Issued on: 10/20/1992
Inventor: Sakai

Inventors

Assignee

Dell USA, L.P.

Application

No. 035008 filed on 03/22/1993

US Classes:

702/186, Computer and peripheral benchmarking324/73.1, PLURAL, AUTOMATICALLY SEQUENTIAL TESTS714/25Fault locating (i.e., diagnosis or testing)

Examiners

Primary: Harvey, Jack B.
Assistant: Miller, Craig Steven

Attorney, Agent or Firm

Huffman; James, Hitt; David

International Class

G06F 015/46

Abstract

A test apparatus and method for automatically testing computing equipment. The test apparatus comprises (1) a switch circuit, coupled to the computing equipment, capable of interrupting and restoring power to the computing equipment, (2) a timer, coupled to the switch circuit, capable of commanding the switch circuit to interrupt power to the computing equipment for a predetermined period of time and (3) a test circuit, coupled to the timer and the computing equipment, capable of determining when the switch circuit has restored power to the computing equipment and whether the computing equipment has successfully restarted following restoration of power. The test apparatus allows a laptop or desktop personal computer to be automatically boot tested, the apparatus having the capacity to display test status to remote users.