Setting circuit of binary threshold value
Patent 5350950 Issued on September 27, 1994. Estimated Expiration Date: 
December 1, 2012. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.
December 1, 2012. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.Patent References 3386042 3497723 3566145 3597633 3885168 3916326 Precision envelope detector and linear rectifier circuitry Method and means for an accurate wideband peak detector Phase controlled regulated power supply Tracking sample and hold phase detector InventorsAssigneeApplicationNo. 983736 filed on 12/01/1992US Classes:327/28, By polarity327/50, By amplitude327/63, Comparison between plural varying inputs327/72Input signal compared to reference derived therefromExaminersPrimary: Callahan, Timothy P.Assistant: Lam, Tuan T. Attorney, Agent or FirmInternational ClassH03K 005/153Foreign Application Priority Data1991-12-04 JPAbstractA binary threshold value setting circuit comprises: a first detecting section to detect the positive polarity side of an input signal, a second detecting section to detect the negative polarity side of the signal; a first envelope detecting section to perform an envelope detection to the signal detected by the first detecting section, a second envelope detecting section to perform an envelope detection to the signal detected by the second detecting section, a threshold value setting section to generate a signal at a level between the level of the signal which has been envelope detected by the first envelope detecting section and the level of the signal which has been envelope detected by the second envelope detecting section, and a capacitor connected between the output side of the first detecting section and the output side of the second detecting section. | |
