Selective deposition of doped silicon-germanium alloy on semiconductor substrate, and resulting structures
Patent 5336903 Issued on August 9, 1994. Estimated Expiration Date: 
May 28, 2013. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.
May 28, 2013. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.Patent ReferencesBinary germanium-silicon interconnect and electrode structure for integrated circuits Selective titanium silicide formation Method of fabricating an high-performance insulated-gate field-effect transistor Patent #: 5168072 InventorsAssigneeApplicationNo. 069030 filed on 05/28/1993US Classes:257/19, Si x Ge 1-x257/65, Non-single crystal, or recrystallized, material containing non-dopant additive, or alloy of semiconductor materials (e.g., Ge x Si 1- x, polycrystalline silicon with dangling bond modifier)257/382, With contact to source or drain region of refractory material (e.g., polysilicon, tungsten, or silicide)257/742, With a semiconductor conductivity substitution type dopant (e.g., germanium in the case of a gallium arsenide semiconductor) in a contact metal)257/755, Polysilicon laminated with silicide257/E21.148, From or through or into an applied layer, e.g., photoresist, nitride (EPO)257/E21.165, Conductive layer comprising silicide (EPO)257/E21.433, Where the source and drain or source and drain extensions are self-aligned to sides of gate (EPO)257/E21.444, Using dummy gate wherein at least part of final gate is self-aligned to dummy gate (EPO)257/E21.507Formation of contacts to semiconductor by use of metal layers separated by insulating layers, e.g., self-aligned contacts to source/drain or emitter/base (EPO)ExaminersPrimary: Mintel, WilliamAttorney, Agent or FirmForeign Patent References
International ClassH01L 023/48AbstractDoped silicon-germanium alloy is selectively deposited on a semiconductor substrate, and the semiconductor substrate is then heated to diffuse at least some of the dopant from the silicon-germanium alloy into the semiconductor substrate to form a doped region at the face of the semiconductor substrate. The doped silicon-germanium alloy acts as a diffusion source for the dopant, so that shallow doped, regions may be formed at the face of the semiconductor substrate without ion implantation. A high performance contact to the doped region is also provided by forming a metal layer on the doped silicon-germanium alloy layer and heating to react at least part of the silicon-germanium alloy layer with at least part of the metal layer to form a layer of germanosilicide alloy over the doped regions. The method of the present invention is particularly suitable for forming shallow source and drain regions for a field effect transistor, and self-aligned source and drain contacts therefor.Other References
Field of SearchNon-single crystal, or recrystallized, material containing non-dopant additive, or alloy of semiconductor materials (e.g., Ge x Si 1- x, polycrystalline silicon with dangling bond modifier)Field effect device in non-single crystal, or recrystallized, Semiconductor material With contact to source or drain region of refractory material (e.g., polysilicon, tungsten, or silicide) Contact of refractory or platinum group metal (e.g., molybdenum, tungsten, or titanium) Including silicide With polysilicon interconnections to source or drain regions (e.g., polysilicon laminated with silicide) Multiple polysilicon layers Gate electrode consists of refractory or platinum group metal or silicide Composite or layered gate insulator (e.g., mixture such as silicon oxynitride) Gate electrode of refractory material (e.g., polysilicon or a silicide of a refractory or platinum group metal) Polysilicon laminated with silicide Gate insulator includes material (including air or vacuum) other than SiO 2 Si x Ge 1-x At least one layer of silicide or polycrystalline silicon With a semiconductor conductivity substitution type dopant (e.g., germanium in the case of a gallium arsenide semiconductor) in a contact metal) For compound semiconductor material | |
