Monolithic IC formed of a CCD, CMOS and a bipolar element
August 13, 2012. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.Patent ReferencesSemiconductor device capable of withstanding high voltage and method of manufacturing same Isolation of integrated circuits utilizing selective etching and diffusion Silicon base CCD-bipolar transistor compatible methods and products Integrated circuit device Wave shaping circuit Charge pump substrate bias generator Charge transfer device having an improved read-out portion Isolation regions formed by locos followed with groove etch and refill CMOS integrated circuit and process for producing an electric isolation zones in said integrated circuit MOS/bipolar device with stepped buried layer under active regions InventorsApplicationNo. 928084 filed on 08/13/1992US Classes:257/370, Combined with bipolar transistor257/215, Charge transfer device257/369, Complementary insulated gate field effect transistors257/506, Including dielectric isolation means257/510, Dielectric in groove257/E21.696Bipolar and MOS technologies (EPO)ExaminersPrimary: Hille, RolfAssistant: Fahmy, Wael Attorney, Agent or FirmForeign Patent References
International ClassesH01L 029/76H01L 029/94 H01L 029/00 Foreign Application Priority Data1989-11-21 JPAbstractA composite semiconductor element includes a semiconductor substrate having a single crystal region projecting in the form of an island, an epitaxial growth layer formed on the semiconductor substrate so as to surround the single crystal region, an insulating isolation layer formed in predetermined regions of the epitaxial growth layer, of the single crystal region, and of the semiconductor substrate so as to insulate/isolate the epitaxial growth layer and the single crystal region from each other and to form a plurality of island-like element regions in the epitaxial growth layer and in the single crystal region, an n-channel MOS transistor and a CCD element respectively formed in element regions in the single crystal region, and a p-channel MOS transistor and a bipolar element respectively formed in element regions in the epitaxial growth layer.Other References
Field of SearchComplementary insulated gate field effect transistorsCombined with bipolar transistor Including dielectric isolation means Combined with pn junction isolation (e.g., isoplanar, LOCOS) Dielectric in groove With complementary (npn and pnp) bipolar transistor structures Complementary devices share common active region (e.g., integrated injection logic, I 2 L) | |
