U.S. patents available from 1976 to present.
U.S. patent applications available from 2005 to present.

Control system for switching duplicated switch units in ATM exchange

Patent 5301184 Issued on April 5, 1994. Estimated Expiration Date: Icon_subject November 6, 2012. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.

Patent References

System for controlling data transmission in ATM switching network
Patent #: 5067123
Issued on: 11/19/1991
Inventor: Hyodo, et al.

Self-routing switching system having dual self-routing switch module network structure
Patent #: 5072440
Issued on: 12/10/1991
Inventor: Isono, et al.

Routing method and routing system for switching system having a plurality of paths
Patent #: 5084867
Issued on: 01/28/1992
Inventor: Tachibana, et al.

Packet switch communication network using packet having virtual channel identifier
Patent #: 5119369
Issued on: 06/02/1992
Inventor: Tanabe, et al.

Apparatus and method for establishing identical data in dual ATM switches
Patent #: 5153578
Issued on: 10/06/1992
Inventor: Izawa, et al.

Switch stage number setting apparatus for MSSR channels Patent #: 5191577
Issued on: 03/02/1993
Inventor: Uchida, et al.

Inventors

Application

No. 972025 filed on 11/06/1992

US Classes:

370/219, Standby switch340/2.23, Alternate routing370/399Employing logical addressing for routing (e.g., VP or VC)

Examiners

Primary: Olms, Douglas W.
Assistant: Hsu, Alpus H.

Attorney, Agent or Firm

International Classes

H04L 012/56
H04Q 011/04

Foreign Application Priority Data

1991-11-08 JP

Abstract

In a control system for switching between a first system and a second system of a duplicated selecting structure in an ATM exchange, one of the first and second systems operates as an active system, and the other operates as a standby system. A generator unit writes specific bits into ATM cells received via an input transmission line. The specific bits respectively written into ATM cells to be transferred via the active system indicate a first state, and those respectively written into the ATM cells to be transferred via the standby system indicate a second state. A first table stores the specific bits respectively assigned to VPI/VCI pairs related to the ATM cells transferred via the first system. A second table stores the specific bits respectively assigned to VPI/VCI pairs related to the ATM cells transferred via the second system. A selecting unit compares the specific bits written into the ATM cells with the specific bits stored in the first and second tables by using the VPI/VCI pairs of the ATM cells, and outputs only ATM cells respectively having specific bits respectively indicating the first state to an output transmission line.

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