Behavioral synthesis of circuits including high impedance buffers
October 28, 2012. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.Patent ReferencesLogic Synthesizer Schematic diagram generating system using library of general purpose interactively selectable graphic primitives to create special applications icons Hardware simulator capable of reducing an amount of information Synthetic netlist system and method Silicon-compiler method and arrangement Automated circuit design method Method and apparatus for locating faults in electronic units Patent #: 5157668 InventorAssigneeApplicationNo. 970601 filed on 10/28/1992US Classes:716/18Logical circuit synthesizerExaminersPrimary: Trans, Vincent N.Attorney, Agent or FirmForeign Patent References
International ClassG06F 015/60AbstractA behavioral design tool which is capable of designing circuits including high impedance buffers from hardware description language specifications. The design tool includes a behavioral synthesizer including a net expression routine, a high impedance structure and control expression routine (HI-Z routine) and a structure synthesis routine. The net expression routine reduces the hardware description language to net expressions which are analyzed by the HI-Z routine to look for high impedance states. If a high impedance state is found in a net expression the HI-Z routine develops the structure for an associated high impedance buffer and an associated high impedance control expression. The structure synthesis routine utilizes the net expressions, control expressions and high impedance buffers to develop circuits which realize the behavior described in the hardware description language. | |
