Repairable ROM array
Error checking and correction circuitry for use with an electrically-programmable and electrically-erasable memory array
Semiconductor memory device having redundant memory and parity capabilities
Semiconductor memory device having redundancy circuit portion
Bipolar-transistor type semiconductor memory device having redundancy configuration
Semiconductor integrated circuit with nonvolatile memory
EEPROM utilizing single transistor per cell capable of both byte erase and flash erase Patent #: 4949309
ApplicationNo. 963838 filed on 10/20/1992
US Classes:714/710, Replacement of memory spare location, portion, or segment365/185.09, Error correction (e.g., redundancy, endurance)365/185.33, Flash365/200, Bad bit714/7, Reconfiguration (e.g., adding a replacement storage component)714/711Spare row or column
ExaminersPrimary: Beausoliel, Robert W. Jr.
Assistant: Hua, Ly V.
Attorney, Agent or Firm
International ClassG06F 011/00
AbstractA system of Flash EEprom memory chips with controlling circuits serves as non-volatile memory such as that provided by magnetic disk drives. Improvements include selective multiple sector erase, in which any combinations of Flash sectors may be erased together. Selective sectors among the selected combination may also be de-selected during the erase operation. Another improvement is the ability to remap and replace defective cells with substitute cells. The remapping is performed automatically as soon as a defective cell is detected. When the number of defects in a Flash sector becomes large, the whole sector is remapped. Yet another improvement is the use of a write cache to reduce the number of writes to the Flash EEprom memory, thereby minimizing the stress to the device from undergoing too many write/erase cycling.
Field of SearchBad bit