Patent References 3428946 3781819 3916380 Digital multifrequency signalling receiver Array processor architecture connection network Device for switching digital data Process for switching time-multiplexed signals transmitted on a carrier, including in particular an optical carrier, and a device embodying this process Telecommunications switching network using digital switching modules Shared memory computer method and apparatus End-to-end information memory arrangement in a line controller InventorsAssigneeApplicationNo. 060719 filed on 05/13/1993US Classes:710/317, Crossbar709/244Centralized controllingExaminersPrimary: Harrell, Robert B.Attorney, Agent or FirmForeign Patent References
International ClassG06F 013/00Foreign Application Priority Data1985-01-24 JPAbstractIn a circuit arrangement for use in accessing selected address numbered with a preselected distance left between two adjacent ones of the selected addresses, a control circuit centralizes control operation of a switching network with reference to a reference one of the selected addresses and the preselected distance to make the switching network form internal paths between input and output port sets of the switching network. Alternatively, when ports of a selected one of the input and output port sets are accessed at a predetermined port interval, the control circuit controls the switching network with reference to the predetermined port interval and a reference port selected from the selected port set. A leading port of the other set is determined to be connected to the reference port. A rearranging circuit may be connected to one of the input and output port sets to rearrange an order of the ports of the one port set in consideration of the port distance. The reference and leading ports may be varied in a time division fashion when a conflict of internal paths otherwise occurs in relation to the port distance.Other References
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