Patent ReferencesOn-off arrangement in a microprocessor controlled remote transmitter for a consumer instrument Synchronous clock stopper for microprocessor CMOS Circuit with reduced power dissipation and a digital data processor using the same Method for reducing power consumed by a static microprocessor Data processing apparatus with energy saving clocking device System for reducing processor power consumption by stopping processor clock supply if a desired event does not occur Apparatus for reducing computer system power consumption Power saving arrangement for a clocked digital circuit 5117449 Communications device with voice recognition and movable element control interface Patent #: 5148471 InventorsAssigneeApplicationNo. 833314 filed on 02/10/1992US Classes:455/574, Power conservation713/321Programmable calculator with power saving featureExaminersPrimary: Kuntz, CurtisAssistant: Cumming, William Attorney, Agent or FirmForeign Patent References
International ClassesH04M 011/00G06F 001/00 Foreign Application Priority Data1991-02-12 FIAbstractA circuit arrangement for a mobile telephone comprises a microprocessor responsive to a clock signal for controlling its functions, and a signalling circuit, e.g. a modem which is coupled to the microprocessor to provide an output clock signal thereto. In the idle states of the processor, the output clock signal is stopped, using a stop signal from the microprocessor. This gives use to reduce power consumption and a consequential increase in battery life.Other References
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