Method for attaching conductive traces to plural, stacked, encapsulated semiconductor die using a removable transfer film
Patent 5273938 Issued on December 28, 1993. Estimated Expiration Date: 
April 30, 2012. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.
April 30, 2012. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.Patent ReferencesCarrier element for an IC module Method for encapsulating semiconductor components using temporary substrates Method of manufacturing a circuit module Method of forming solder terminals for a pinless ceramic module Arrangement of a semiconductor device for use in a card Integrated circuit device and manufacturing method thereof Patent #: 5122860 InventorsAssigneeApplicationNo. 876315 filed on 04/30/1992US Classes:438/107, Assembly of plural semiconductive substrates each possessing electrical device438/118, Including adhesive bonding step438/127EncapsulatingExaminersPrimary: Chaudhuri, OlikAssistant: Graybill, David E. Attorney, Agent or FirmForeign Patent References
International ClassesH01L 021/28H01L 021/70 H01L 021/56 H01L 021/60 Foreign Application Priority Data1989-09-06 JPAbstractA low cost manufacturing method is used to fabricate a small multichip semiconductor device (30). In one embodiment, a pattern of conductive traces (13) is formed on a film of transfer material (12). A first semiconductor die (15) is interconnected to the traces and a resin body (20) is formed around the first die and one side of the traces. The film of transfer material forms, at this stage of the process, one side of the first package. The film of transfer material is then peeled from the pattern of conductive traces and the first resin body to expose the other side of the traces. A second semiconductor die (23) is interconnected to the exposed side of the traces. A second resin body (25) is formed around the second die and portions of the exposed traces. Solder balls (26) are coupled to the exposed portions of the traces to establish external electrical connections to each die. | |
