Patent ReferencesMethod of producing enhancement mode and depletion mode FETs Method of manufacturing GaAs semiconductor device Heterojunction device Making complementary integrated p-MODFET and n-MODFET Method of producing a two-dimensional electron gas semiconductor device 4952527 Two dimensional electron gas semiconductor device Fabrication of GaAs integrated circuits Method to integrate HBTs and FETs Method for fabricating semiconductor device InventorsAssigneeApplicationNo. 973906 filed on 11/10/1992US Classes:438/172, Having heterojunction (e.g., HEMT, MODFET, etc.)257/E21.697, Substrate is Group III-V semiconductor (EPO)257/E21.698, Substrate is Group II-VI semiconductor (EPO)257/E27.012, Made of compound semiconductor material, e.g. III-V material (EPO)257/E27.068, Schottky barrier gate field-effect transistor (EPO)438/576Into grooved or recessed semiconductor regionExaminersPrimary: Hearn, Brian E.Assistant: Trinh, Michael Attorney, Agent or FirmForeign Patent References
International ClassH01L 021/70AbstractGenerally, and in one form of the invention, an integrated circuit is disclosed for providing low-noise and high-power microwave operation comprising: an epitaxial material structure comprising a substrate 10, a low-noise channel layer 14, a low-noise buffer layer 16, a power channel layer 18, and a moderately doped wide bandgap layer 20; a first active region 24 comprising a first source contact 32 above the wide bandgap layer 22, a first drain contact 36 above the wide bandgap layer 22, wherein the first source contact 32 and the first drain contact 36 are alloyed and thereby driven into the material structure to make contact with the low-noise channel layer 14, and a first gate contact 28 to the low-noise buffer layer 16; and a second active region 26 comprising a second source contact 34 above the wide bandgap layer 22, a second drain contact 38 above the wide bandgap layer 22, wherein the second source contact 34 and the second drain contact 38 are alloyed and thereby driven into the material structure to make contact with the power channel layer 18, and a second gate contact 30 to the wide bandgap layer 22; wherein the first active region 24 and the second active region 26 are electrically isolated from one another, and whereby the integrated circuit is formed with all epitaxial layers formed during a single epitaxial growth cycle and is capable of providing low-noise, high-power, and switching operation at microwave frequencies. | |