U.S. patents available from 1976 to present.
U.S. patent applications available from 2005 to present.

A/D converter

Patent 5225837 Issued on July 6, 1993. Estimated Expiration Date: Icon_subject May 29, 2011. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.

Patent References

3242348

Analog/digital converter
Patent #: 4058806
Issued on: 11/15/1977
Inventor: Nadler

C-R type D/A converter
Patent #: 4618847
Issued on: 10/21/1986
Inventor: Iida ,   et al.

Digital-to-analog converter
Patent #: 4837572
Issued on: 06/06/1989
Inventor: Gulczynski

Flash analog-to-digital converter with logarithmic/linear threshold voltages
Patent #: 4928102
Issued on: 05/22/1990
Inventor: Katzenstein

Pipelined analog to digital converter with summing and comparator functions occurring in parallel for each bit Patent #: 4994808
Issued on: 02/19/1991
Inventor: Wichelman

Inventors

Application

No. 706834 filed on 05/29/1991

US Classes:

341/159, Parallel type341/158Analog input compared with static reference

Examiners

Primary: Logan, Sharon D.

Attorney, Agent or Firm

Foreign Patent References

  • 62111525 JP. 11/13/1985

International Class

H03M 001/36

Foreign Application Priority Data

1990-06-26 JP

Abstract

An A/D converter includes a resistor network generating a reference voltage, a level detector for detecting the level of an input analogue signal with a reference voltage from the resistor network as a reference, and an encoder for providing a digital signal by encoding the output of the level detector. The level detector includes a plurality of comparators for bilevel-processing the input analogue signal with a preselected voltage from the resistor connection nodes of the resistor network as a reference voltage. The resistor network comprises a plurality of resistor elements between a first node receiving a first reference voltage and a second node receiving a second reference voltage, which are interconnected to provide a voltage from an associated connection node that is 1/2j times the difference between said first reference voltage and said second reference voltage. The comparator includes capacitors for providing the difference between the input analogue signal and the reference voltage by a capacitor coupling, and an inverter amplifier for determining the positive or negative of the voltage change generated by the capacitors. This structure implements an A/D converter of high precision with less elements.

Other References

  • Maio et al., "A 500 MHz 8b DAC", IEEE Journal of Solid-State Circuits, Feb. 13, 1985, pp. 78-80
  • Joey Doernberg et al., "A 10-bit 5-Msample/S CMOS Two-Step Flash ADC", IEEE Journal of Solid-State Circuits, vol. 24, No. 2, Apr., 1989, pp. 241-24
PatentsPlus Images
Enhanced PDF formats
loading...
PatentsPlus: add to cart
PatentsPlus: add to cartSearch-enhanced full patent PDF image
$9.95more info
PatentsPlus: add to cart
PatentsPlus: add to cartIntelligent turbocharged patent PDFs with marked up images
$16.95more info
 
Sign InRegister
Username  
Password   
forgot password?