Charge transfer device having circuit for adjusting the high level of the reset pulse
Patent 5224134 Issued on June 29, 1993. Estimated Expiration Date: 
March 11, 2011. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.
March 11, 2011. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.Patent ReferencesCharge transfer device output Output circuit of a charge transfer device Charge-coupled device floating diffusion output reset Charge transfer device with reset voltage generating circuit Charge transfer device Patent #: 5033068 InventorAssigneeApplicationNo. 667155 filed on 03/11/1991US Classes:377/60, Particular input or output means257/239, Signal charge detection type (e.g., floating diffusion or floating gate non-destructive output)377/58, Compensating for or preventing signal charge deterioration377/63, Charge-coupled device438/145Having additional electrical deviceExaminersPrimary: Sikes, William L.Assistant: Duong, Tai V. Attorney, Agent or FirmInternational ClassesH01L 029/78G11C 019/28 Foreign Application Priority Data1990-03-10 JPAbstractA charge transfer device comprises a charge transfer section having a charge transfer region formed in a semiconductor substrate and transfer electrodes formed on the semiconductor substrate, and a reset transistor having a floating diffusion region formed in the semiconductor substrate for receiving an electric charge transferred from the charge transfer section, a reset drain applied with a reset voltage, and a reset gate formed above a channel between the floating diffusion region and the reset drain, the reset gate being applied with a reset pulse. A a peak hold circuit is connected to the reset gate of the reset transistor for hold a peak level of the reset voltage. A potential detection circuit includes a dummy transistor having a drain connected to a voltage VDD, a source grounded through a resistor which is considerably larger than an on-resistance of the dummy transistor itself, and a gate electrode connected to an output of the peak hold circuit. The dummy transistor has the same characteristics as that of the reset transistor, and the drain of the dummy transistor is directly connected to the reset drain of the reset transistor.Field of SearchCHARGE TRANSFER DEVICE (E.G., ANALOGUE SHIFT REGISTER, CCD, BUCKET BRIGADE DEVICE)Compensating for or preventing signal charge deterioration With feedback Particular input or output means Direction and/or path flow control (e.g., by clocking or biasing, by charge splitting) In charge-coupled device Charge-coupled device | |
