Method of fabricating semiconductor device having sidewall spacers and oblique implantation
Patent 5217910 Issued on June 8, 1993. Estimated Expiration Date: 
October 24, 2011. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.
October 24, 2011. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.Patent ReferencesMethod of making symmetrically controlled implanted regions using rotational angle of the substrate Process for forming lightly-doped-drain (LDD) without extra masking steps Semiconductor device and a process for manufacturing the same LDD transistor process having doping sensitive endpoint etching Patent #: 4978626 InventorsApplicationNo. 779498 filed on 10/24/1991US Classes:438/231, Plural doping steps257/E21.345, Characterized by the angle between the ion beam and the crystal planes or the main crystal surface (EPO)257/E21.633, With particular manufacturing method of channel, e.g., channel implants, halo or pocket implants, or channel materials (EPO)257/E29.255, With field effect produced by insulated gate (EPO)438/302, Oblique implantation438/305Plural doping stepsExaminersPrimary: Hearn, Brian E.Assistant: Chaudhari, C. Attorney, Agent or FirmForeign Patent References
International ClassH01L 021/265Foreign Application Priority Data1990-11-05 JPAbstractFirst, a low-concentration impurity layer is formed by obliquely implanting an n-type impurity at a prescribed angle with respect to the surface of a p-type semiconductor substrate, using a gate electrode formed on the semiconductor substrate as a mask. Thereafter a sidewall spacer is formed on the sidewall of the gate electrode, and then a medium-concentration impurity layer is formed by obliquely implanting an n-type impurity to the surface of the semiconductor substrate. Thereafter a high-concentration impurity layer is formed by substantially perpendicularly implanting an n-type impurity with respect to the surface of the semiconductor substrate. According to this method, the low-concentration impurity layer in source and drain regions having triple diffusion structures can be accurately overlapped with the gate electrode, with no requirement for heat treatment for thermal diffusion.Other References
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