Method for forming a grown bipolar electrode contact using a sidewall seed
June 24, 2012. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.Patent ReferencesMethod of filling trenches with silicon and structures Method for fabricating a bipolar transistor having self aligned base and emitter Method for filling trenches from a seed layer Method of manufacturing super self-alignment technology bipolar transistor Bipolar transistor Method of forming bipolar transistor having self-aligned emitter-base using selective and non-selective epitaxy Method for fabricating self-aligned semiconductor devices Method for making an NPN transistor with controlled base width compatible with making a Bi-MOS integrated circuit Method of manufacturing a semiconductor device Patent #: 5098638 InventorsAssigneeApplicationNo. 903300 filed on 06/24/1992US Classes:438/365, Forming active region from adjacent doped polycrystalline or amorphous semiconductor257/E21.375, Silicon vertical transistor (EPO)257/E21.585, Filling of holes, grooves, vias or trenches with conductive material (EPO)438/564Polycrystalline semiconductor sourceExaminersPrimary: Hearn, Brian E.Assistant: Nguyen, Tan T. Attorney, Agent or FirmForeign Patent References
International ClassH01L 021/265AbstractA method for forming a grown bipolar transistor electrode contact wherein a substrate (12) is provided. A doped region (31) is formed within the substrate (12). A dielectric layer (26) is formed having an opening (36) which exposes a portion of the doped region (31). Conductive spacers (38) are formed adjacent a sidewall of the dielectric layer (26). A conductive region (34) is formed through either a selective process or an epitaxial process by using the conductive spacers (38) as a source for epitaxial or selective formation. The conductive region (34) forms the grown bipolar electrode contact by electrically contacting the doped region (31). The conductive region (34) is optionally overgrown in a lateral direction over a top surface of the dielectric layer (26) to form a self-aligned electrical contact pad for the doped region (31).Other References
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