Semiconductor device of MOS structure having p-type gate electrode

Patent 5189504 Issued on February 23, 1993. Estimated Expiration Date:

January 30, 2012. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.

Abstract Claims Description Full Text

Patent References

Insulated gate type field effect transistors
Patent #: 4074300
Issued on: 02/14/1978
Inventor: Sakai , et al.

MOS double polysilicon read-only memory and cell
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Inventor: Shappir

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Patent #: 4558338
Issued on: 12/10/1985
Inventor: Sakata

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Patent #: 4601778
Issued on: 07/22/1986
Inventor: Robb

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Inventors

Assignee

Nippon Telegraph and Telephone Corporation

Application

No. 827904 filed on 01/30/1992

US Classes:

257/422, With magnetic field directing means (e.g., shield, pole piece, etc.)257/756, Multiple polysilicon layers257/914, POLYSILICON CONTAINING OXYGEN, NITROGEN, OR CARBON (E.G., SIPOS)257/E21.201, Conductor layer next to insulator is Si or Ge or C and their non-Si alloys (EPO)257/E21.204, Conductor layer next to insulator is non-MeSi composite or compound, e.g., TiN (EPO)257/E29.154, Silicon gate conductor material (EPO)257/E29.155Multiple silicon layers

Examiners

Primary: Carroll, J.

Attorney, Agent or Firm

Blakely, Sokoloff, Taylor & Zafman

International Classes

H01L 029/04
H01L 029/167
H01L 029/207
H01L 029/227

Foreign Application Priority Data

1989-12-11 JP

Abstract

A semiconductor device of a MOS structure having a p-type gate electrode has a gate electrode including at least two layers consisting of a boron-doped polysilicon layer and a polysilicon layer doped with boron and an inert material. This inert material is nitrogen or carbon.

Other References

T. Hori, "Demands for Submicron MOSFET's and Nitrided Oxide Gate-Dielectrics", Extended Abstracts of the 21st Conference on Solid State Devices and Materials, Tokyo, 1989, pp. 197-200
J. M. Sung et al., "Fluorine Effect on Boron Diffusion of P+ Gate Devices", 1989 IEDM89, pp. 447-450
I. Kato et al., "Ammonia-Annealed SiO₂ Films for Thin-Gate Insulator", Japanese Journal of Applied Physics, vol. 21 (1982) Supplement 21-1, pp. 153-158
F. K. Baker et al., "The Influence of Fluorine on Threshold Voltage Instabilities in P⁺ Polysilicon Gated P-Channel MOSFETs", 1989 DEDM89, pp. 443-446
J. Y. C. Sun et al., "Study of Boron Penetration Through Thin Oxide with P⁺ -Polysilicon Gate", Digest of the International Symposium on VLSI Technology (1989), pp. 17-18
M. Miyake et al., "Subquarter-Micrometer Gate-Length p-Channel and n-Channel MOSFET's with Extremely Shallow Source-Drain Junctions", IEEE Transactions on Electron Devices, vol. 36, No. 2, Feb. 1989, pp. 392-397
N. Kasai et al., "0.25 μm CMOS Technology Using P⁺ Polysilicon Gate PMOSFET", 1987, IEDM87, pp. 367-370
E. N. Mokhov et al., "Constant-Concentration Diffusion of Boron in Silicon Carbide", Sov. Phys. Solid State 30(1), Jan. 1988, pp. 140-14