System and method for controlling a highly parallel multiprocessor using an anarchy based scheduler for parallel execution thread scheduling

Patent 5179702 Issued on January 12, 1993. Estimated Expiration Date:

June 11, 2010. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.

Abstract Claims Description Full Text

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Inventors

Assignee

Supercomputer Systems Limited Partnership

Application

No. 537466 filed on 06/11/1990

US Classes:

718/102, Process scheduling717/124, Testing or debugging717/146, Including intermediate code717/151, Optimization718/104, Resource allocation718/106Dependency based cooperative processing of multiple programs working together to accomplish a larger task

Examiners

Primary: Lee, Thomas C.
Assistant: Ellis, Richard L.

Attorney, Agent or Firm

Patterson & Keough

International Class

G06F 009/46

Abstract

An integrated software architecture for a highly parallel multiprocessor system having multiple tightly-coupled processors that share a common memory efficiently controls the interface with and execution of programs on such a multiprocessor system. The software architecture combines a symmetrically integrated multithreaded operating system and an integrated parallel user environment. The operating system distributively implements an anarchy-based scheduling model for the scheduling of processes and resources by allowing each processor to access a single image of the operating system stored in the common memory that operates on a common set of operating system shared resources. The user environment provides a common visual representation for a plurality of program development tools that provide compilation, execution and debugging capabilities for multithreaded user programs and assumes parallelism as the standard mode of operation.