High resistance Polysilicon load resistor
January 12, 2010. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.Patent ReferencesInsulated gate field effect silicon-on-sapphire transistor and method of making same Doped polysilicon silicide semiconductor integrated circuit interconnections Local interconnect Process of self aligned nitridation of TiSi2 to form TiN/TiSi2 contact Method for making static random-access memory device Static random access memory having structure of first-, second- and third-level conductive films Low resistance metal contact for silicon devices Non-destructive energy beam activated conductive links Semiconductor memory device with barrier layer Integrated circuit process with TiN-gate transistor Inventors
AssigneeApplicationNo. 464094 filed on 01/12/1990US Classes:257/536, Including resistive element257/767, Resistive to electromigration or diffusion of the contact or lead material257/768, Refractory or platinum group metal or alloy or silicide thereof257/915, WITH TITANIUM NITRIDE PORTION OR REGION257/E21.602, To produce devices each consisting of plurality of components, e.g., integrated circuits (EPO)257/E27.101Load element being a resistor (EPO)ExaminersPrimary: Carroll, J.Attorney, Agent or FirmForeign Patent References
International ClassesH01L 027/02H01L 023/48 H01L 029/46 AbstractA load resistor for use in a semiconductor integrated circuit consists of two portions of conductive material, typically strips of either a silicide or a composite polycrystalline silicon layer and silicide layer formed thereon, formed on a semiconductor substrate and separated from each other by a selected distance. An electrically conductive dopant diffusion barrier is formed on the first and second portions of conductive material. A polycrystalline silicon material is then placed on the structure such that one portion of the polycrystalline silicon material is in ohmic contact through the diffusion barrier with the first portion of conductive material and the other portion of the polycrystalline silicon material is in ohmic contact through the diffusion barrier with the second portion of conductive material. Typically the polycrystalline silicon material is placed on an insulation layer formed on the semiconductor substrate in the portion of the substrate between the two portions of conductive material. The diffusion barrier prevents any dopant from the conductive material from diffusing into the polycrystalline silicon material thereby allowing the polycrystalline silicon material to function as a load resistor having a high resistance in the giga-ohms range. Subsequent high temperature processing of the structure does not change the resistance of the polycrystalline silicon because the dopant diffusion barrier prevents any dopant from the underlying conductive material from diffusing into the polycrystalline silicon material.Other References
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