Patent References 3808673 Integrated circuit package Stacked interdigitated lead frame assembly Plastic pin grid array chip carrier Method of assembling an optocoupler Packaging system for multiple semiconductor devices Peripheral/area wire bonding technique Electronic component package using multi-level lead frames Patent #: 4801765 InventorAssigneeApplicationNo. 663223 filed on 03/01/1991US Classes:29/827, Beam lead frame or beam lead device257/666, LEAD FRAME257/E23.038, Insulative substrate being used as die pad, e.g., ceramic, plastic (EPO)257/E23.042, Plurality of lead frames mounted in one device (EPO)257/E23.052, Assembly of semiconductor devices on lead frame (EPO)257/E23.128, Encapsulation having cavity (EPO)438/107, Assembly of plural semiconductive substrates each possessing electrical device438/123, Lead frame438/124And encapsulatingExaminersPrimary: Kunemund, RobertAssistant: Graybill, David E. Attorney, Agent or FirmForeign Patent References
International ClassesH01L 021/56H01L 021/58 H01L 021/60 AbstractA packaged semiconductor device is disclosed having at least two electronic components encapsulated in a single body of standard size and pin-out configuration. In accordance with one embodiment of this invention, two leadframes, having electronic components electrically coupled thereto, are positioned such that the electronic components are in a stacked relationship and the outer portions of the two sets of leads within each leadframe are interdigitated. The configuration enables all components to be accessed independently and minimizes the footprint of the device while maintaining a standard package outline.Field of SearchBeam lead frame or beam lead device | |