U.S. patents available from 1976 to present.
U.S. patent applications available from 2005 to present.

Interconnection structure and test method

Patent 5147084 Issued on September 15, 1992. Estimated Expiration Date: Icon_subject August 9, 2011. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.

Patent References

3719981

Polyimide coating process and material
Patent #: 4238528
Issued on: 12/09/1980
Inventor: Angelo ,   et al.

Methods for applying solder to an article
Patent #: 4376505
Issued on: 03/15/1983
Inventor: Wojcik

Solder interconnection structure for joining semiconductor devices to substrates that have improved fatigue life, and process for making Patent #: 4604644
Issued on: 08/05/1986
Inventor: Beckham ,   et al.

Inventors

Application

No. 743048 filed on 08/09/1991

US Classes:

228/56.3, SOLDER FORM174/259, Adhesive/bonding174/263, With solder228/139, Using separate fastener228/175, Plural diverse bonding228/180.22, Lead-less (or "bumped") device228/215, By confining filler228/254, Adherent solid layer or coating (e.g., pretinned)257/48, TEST OR CALIBRATION STRUCTURE257/772, Solder composition257/E21.503, Encapsulation of active face of flip chip device, e.g., under filling or under encapsulation of flip-chip, encapsulation perform on chip or mounting substrate (EPO)257/E21.705Assembly of devices consisting of solid-state components formed in or on a common substrate; assembly of integrated circuit devices (EPO)

Examiners

Primary: Heinrich, Samuel M.

Attorney, Agent or Firm

International Classes

B23K 101/40
H05K 003/34
H01L 021/60

Abstract

Disclosed is a connector structure on a substrate which includes at least one first solder portion on the surface of the substrate; at least one second solder portion connected to each of the at least one first solder portions; and an epoxy layer disposed about the at least one first and second solder portions in such a manner as to cover the first solder portion and contact, but not cover, the second solder portion. Also disclosed is a connector structure on a substrate which includes at least one first solder portion on the surface of said substrate; at least one second solder ball portion connected to the at least one first solder portions; wherein the melting point of the second solder ball portion is relatively higher than that of the first solder portion. Finally, disclosed is a method of testing the solderability of the above structures.

Other References

  • "Insert Layer for Surface Mount Components", Research Disclosure, Jan. 1989, No. 29
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