Data communication method and apparatus using neural-networks
Synchronous processor with simultaneous instruction processing and data transfer Patent #: 5038282
ApplicationNo. 486644 filed on 02/28/1990
US Classes:706/38, Analog neural network706/27, Architecture706/39Modifiable weight
ExaminersPrimary: MacDonald, Allen R.
Assistant: Davis, George B.
Attorney, Agent or Firm
International ClassesG06F 015/18
Foreign Application Priority Data1989-03-01 JP
AbstractA learning system in a neuron computer includes a neural network for receiving an analog signal from a first analog bus through an analog input port in a time divisional manner and performing a sum-of-the-products operation, and outputting an analog output signal to a second analog bus. A control pattern memory stores a pattern of a signal for controlling the neural network. A sequencer produces an address of the control pattern memory and a weight memory. The weight memory stores weight data of the neural network. A digital control unit controls the neural network, control pattern memory, sequencer, and weight memory, and executes a learning algorithm. The learning system further includes an input control unit provided on the input side of the neural network for selecting an input signal for executing the learning algorithm input from the digital control unit or an analog input signal input from the analog input port.