Abstract

An apparatus and method for transferring a data payload (SPE) from a first substantially SONET signal into a second substantially SONET signal of different frequency is provided. The apparatus has: a circuit for extracting the SPE from the first SONET signal and sending the bytes of the SPE, according to a first clock, to a FIFO for storage; a circuit for obtaining the SPE bytes from the FIFO according to a second clock, for building the SPE into the second substantially SONET signal; and a circuit for comparing the relative byte phases of the first and second clocks. The byte phase comparison circuit serves two functions. In order to avoid read/write conflicts in the FIFO, it generates and sends a signal to the extracting circuit which causes the extracting circuit to change the byte phase (i.e. timing) at which bytes are sent to the FIFO. Also, in order to adjust the SPE for frequency differences between the first and second substantially SONET signals, the byte phase comparison circuits sends a signal to the circuit which builds the second substantially SONET signal when the two SONET signals have slipped a byte relative to each other. In response thereto, the second substantially SONET signal building circuit generates a negative or positive stuff.