U.S. patents available from 1976 to present.
U.S. patent applications available from 2005 to present.

Apparatus with reconfigurable counter includes memory for storing plurality of counter configuration files which respectively define plurality of predetermined counters

Patent 5109503 Issued on April 28, 1992. Estimated Expiration Date: Icon_subject May 22, 2009. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.

Patent References

Emulation of target system interrupts through the use of counters
Patent #: 4031517
Issued on: 06/21/1977
Inventor: Hirtle

In-circuit emulator
Patent #: 4674089
Issued on: 06/16/1987
Inventor: Poret ,   et al.

Size configurable data storage system
Patent #: 4751671
Issued on: 06/14/1988
Inventor: Babetski ,   et al.

Debugging microprocessor capable of switching between emulation and monitor without accessing stack area
Patent #: 4924382
Issued on: 05/08/1990
Inventor: Shouda

Automatic design system of logic circuit Patent #: 4964056
Issued on: 10/16/1990
Inventor: Bekki, et al.

Inventors

Assignee

Application

No. 355266 filed on 05/22/1989

US Classes:

703/24Of peripheral device

Examiners

Primary: Lee, Thomas C.
Assistant: Geckil, Mehmet B.

Attorney, Agent or Firm

International Class

G06F 015/60

Abstract

A reconfigurable counter is provided which includes first and second memories coupled via a common bus to a microprocessor which controls the process of configuring and reconfiguring the counter. A programmable hardware array, coupled to the microprocessor, is capable of being programmed to emulate a plurality of different counter types. The first memory stores a plurality of different counter configuration profiles, each of which corresponds to a different type counter configuraiton. In one or more of the selected counter types, different counter modes such as an up-down counter mode, pulse direction counter mode and A quad B counter modes are available. When the user indicates a selected counter profile to the microprocessor, the microprocessor writes the corresponding counter configuration profile from the first memory into the programmable hardware array using the parameters or modes of operation stored in the second memory until such time as the user indicates the choice of another counter profile to the microprocessor.

Other References

  • Xilinx Technical Data, XC3000 Logic Cell™ Array Family, Copyright 198
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