Tri-state output buffer circuit including a capacitor and dynamic depletion mode switching device
High-speed, high-drive output buffer circuits with reduced ground bounce
CMOS Output buffer providing mask programmable output drive current
Input circuit having improved noise immunity
Data output circuit
Output buffer circuit used for stable voltage source
Output buffer with ground bounce control
Output buffer for reducing switching induced noise Patent #: 4961010
ApplicationNo. 503012 filed on 04/02/1990
US Classes:326/87, Having plural output pull-up or pull-down transistors326/27, With field effect-transistor326/103Complementary FET`s
ExaminersPrimary: Westin, Edward P.
Assistant: Bertelson, David R.
Attorney, Agent or Firm
International ClassesH03K 017/16
AbstractA pre-driver stage includes two pairs of series-stacked transistors for responding to input stage outputs and provides first and second outputs to an output driver stage. The first output becomes low at a certain delay period after the second output becomes low, and the second output becomes high at a certain delay period after the first output becomes high. Therefore, the turn-off of the active driver transistor is completed before the turn-on of the opposite output transistor, inhibiting an overlap current. In another form, the buffer circuit also uses assist transistors placed near the driver transistors for assisting the opposite driver transistors in turning off.