Single-chip microcomputer
August 27, 2010. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.Patent ReferencesInterrupt operation in systems emulator mode for microcomputer Microprocessor having a programmable logic array Microprocessor Single chip microcomputer capable of debugging an external program without an increase of the number of terminals/ports Built-in parallel testing circuit for use in a processor Topography for sixteen bit CMOS microprocessor with eight bit emulation and abort capability Microcomputer with a detecting function of a memory access error Semiconductor integrated circuit device with built-in arrangement for memory testing Emulator system utilizing a program counter and a latch coupled to an emulator memory for reducing fletch line of instructions stored in the emulator memory Data processing system emulation with microprocessor in place InventorsAssigneeApplicationNo. 572545 filed on 08/27/1990US Classes:714/27, Particular access structure714/736Device response compared to expected fault-free responseExaminersPrimary: Smith, JerryAssistant: Hua, Ly V. Attorney, Agent or FirmForeign Patent References
International ClassesG06F 012/00G06F 013/38 Foreign Application Priority Data1986-11-10 JPAbstractIn an evaluation single-chip microcomputer which includes circuit elements connected to an internal bus and capable of storing data or of arithmetic operation, the contents of the circuit elements being required to be known outside of the microcomputer, a control circuit decodes instructions supplied through the internal bus and produces control signals for controlling the operations of the circuit elements, the data written in each of the circuit elements is transmitted to the internal bus during execution of any one of instructions involving transfer of data into the circuit element, and output terminals are provided for outputting part of the control signals from the control circuit and part of the output signals from the circuit elements through the internal bus, the control signals including write control signals for writing data in the circuit elements. | |
