Large constraint length high speed viterbi decoder based on a modular hierarchial decomposition of the deBruijn graph
June 19, 2009. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.Patent References 3789360 Apparatus for decoding error-correcting codes Viterbi decoder comprising a majority circuit in producing a decoded signal Method and apparatus for implementing a maximum-likelihood decoder in a hypercube network Viterbi decoder with reduced number of data move operations Method and apparatus for implementing a traceback maximum-likelihood decoder in a hypercube network Method and installation for digital communication, particularly between and toward moving vehicles Trellis coded modulation for transmission over fading mobile satellite channel Patent #: 4945549 Inventors
AssigneeApplicationNo. 368264 filed on 06/19/1989US Classes:714/795Viterbi decodingExaminersPrimary: Beausoliel, RobertInternational ClassG06F 011/10AbstractA method of formulating and packaging decision-making elements into a long constraint length Viterbi decoder which involves formulating the decision-making processors as individual Viterbi butterfly processors that are interconnected in a deBruijn graph configuration. A fully distributed architecture, which achieves high decoding speeds, is made feasible by novel wiring and partitioning of the state diagram. This partitioning defines universal modules, which can be used to build any size decoder, such that a large number of wires is contained inside each module, and a small number of wires is needed to connect modules. The total system is modular and hierarchical, and it implements a large proportion of the required wiring internally within modules and may include some external wiring to fully complete the deBruijn graph. pg,14 | |
