Interpolating digital filter
Interpolating digital filter with input buffer
Interpolation-decimation circuit for increasing or decreasing digital sampling frequency
Electronic data processing system for real time data processing
(b+a)-Bit-A/D convertor with b-bit auxiliary A/D convertor
Decimation, linear phase, digital FIR filter
Programmable digital detector for the demodulation of angle modulated electrical signals
ApplicationNo. 432545 filed on 11/07/1989
US Classes:702/197, Having multiple filtering stages327/403, Parallel controlled paths341/122, SAMPLE AND HOLD370/497, Using particular filtering technique370/535, Multiplexing combined with demultiplexing370/538, Plural input channels of different rates to a single common rate output channel708/313Decimation/interpolation
ExaminersPrimary: Dixon, Joseph L.
International ClassH04J 015/00
AbstractParallel multistage, multirate digital filters are executed by a digital signal processor for signals on a plurality of channels. Parallel signals are converted from a first sampling frequency to a second sampling frequency by applying the signal from each channel to one of the substantially identical multistage, multirate digital filters. Each stage of each multistage, multirate digital filter includes a plurality of subfilters and a commutator for indicating a subfilter for execution. The commutators index at the same frequency for like stages of each multistage, multirate digital filters. Initial commutator positions are staggered between multistage, multirate digital filters at at least the highest rate stage. Variable delay lines may be included in each channel to compensate for interchannel data skew introduced by commutator staggering.