Silicon substrate multichip assembly
Patent 5061987 Issued on October 29, 1991. Estimated Expiration Date: 
January 9, 2010. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.
January 9, 2010. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.Patent References 3372070 Multichip thin film module Semiconductor device having improved lead attachment Semiconductor device Silicon-based mounting structure for semiconductor optical devices Patent #: 4937660 InventorAssigneeApplicationNo. 462668 filed on 01/09/1990US Classes:257/702, Of insulating material other than ceramic257/724, With discrete components257/729, Portion of housing of specific materials257/E23.008, Semiconductor insulating substrates (EPO)257/E23.174, Conductive vias through substrate with or without pins, e.g., buried coaxial conductors (EPO)257/E23.181, Characterized by shape of container or parts, e.g., caps, walls (EPO)257/E23.192, Material being electrical insulator, e.g., glass (EPO)257/E25.012Devices being arranged next to each other (EPO)ExaminersPrimary: LaRoche, Eugene R.Assistant: Ratliff, R. A. Attorney, Agent or FirmInternational ClassH01L 023/48AbstractA multichip electronic package uses a silicon substrate for chip mounting and interconnects, micro-machined inverted and non-inverted truncated vias for intrinsically hermetically sealed I/O connections, and an anodically bonded silicon cover, with support posts. Stacked, colocated and inverted vias are provided for increased chip and interconnect density within an intrinsically sealed, thermally matched package. | |
