Digital error correction system for subranging analog-to-digital converters
June 4, 2010. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.Patent ReferencesHarmonic distortion reduction technique for data acquistion Self-calibrating pipelined subranging analog-to-digital converter Subranging analog-to-digital converter with digital error correction Architecture for high sampling rate, high resolution analog-to-digital converter system Autocalibrated multistage A/D converter Subranging analog-to-digital converter with calibration Patent #: 4947168 InventorApplicationNo. 533263 filed on 06/04/1990US Classes:341/156, Coarse and fine conversions341/118, CONVERTER COMPENSATION341/120, CONVERTER CALIBRATION OR TESTING341/161Acting sequentiallyExaminersPrimary: Scott, J. R.Assistant: Logan, Sharon D. Attorney, Agent or FirmInternational ClassesH03M 001/44H03M 001/10 AbstractA general architecture to correct conversion errors of a multi-stage, pipelined subranging analog-to-digital (A/D) converter includes cascaded stages, each stage generating a binary conversion signal representing the nearest quantized level below that of the analog input signal and a residual analog signal applied to the next conversion stage. The binary conversion signal from each stage addresses individual or common look-up tables providing a compensated binary signal selected to compensate for nonidealities of the A/D converter components. The compensated binary signals from the look-up tables provide a corrected output signal when summed together. A simple method of calibration for the A/D converter makes use of a least-mean-squared adaptation algorithm. The A/D converter accommodates practical circuit nonidealities such as component mismatching, gain error and voltage offsets, and handles high levels of amplifier nonlinearity. The architecture is applicable to any subranging converter with arbitrary numbers of stages and bits per stage.Other References
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