U.S. patents available from 1976 to present.
U.S. patent applications available from 2005 to present.

Process for preventing a native oxide from forming on the surface of a semiconductor material and integrated circuit capacitors produced thereby

Patent 5032545 Issued on July 16, 1991. Estimated Expiration Date: Icon_subject October 30, 2010. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.

Patent References

Process for direct thermal nitridation of silicon semiconductor devices
Patent #: 4277320
Issued on: 07/07/1981
Inventor: Beguwala ,   et al.

Method for forming a nitride insulating film on a silicon semiconductor substrate surface by direct nitridation
Patent #: 4298629
Issued on: 11/03/1981
Inventor: Nozaki ,   et al.

Native oxide reduction for sealing nitride deposition
Patent #: 4855258
Issued on: 08/08/1989
Inventor: Allman ,   et al.

Method for wafer treating
Patent #: 4906328
Issued on: 03/06/1990
Inventor: Freeman, et al.

Annealing process to stabilize PECVD silicon nitride for application as the gate dielectric in MOS devices Patent #: 4962065
Issued on: 10/09/1990
Inventor: Brown, et al.

Inventors

Application

No. 605748 filed on 10/30/1990

US Classes:

438/762, At least one layer formed by reaction with substrate257/E21.226, Dry cleaning (EPO)257/E21.293, Of silicon nitride (EPO)257/E21.396, Metal-insulator-semiconductor capacitor, e.g., trench capacitor (EPO)438/396, Stacked capacitor438/775, Nitridation438/791, Silicon nitride formation438/906, CLEANING OF WAFER AS INTERIM STEP438/974SUBSTRATE SURFACE PREPARATION

Examiners

Primary: Hearn, Brian E.
Assistant: Dang, Trung

Attorney, Agent or Firm

International Class

H01L 000/00

Abstract

A process for forming silicon nitride layers on silicon substrates which includes initially heating the silicon substrates in a rapid thermal processor and in a substantially oxygen-free and residual moisture free environment to form a thin Si3 N4 layer directly on the silicon surface which is free of any measurable native SiO2 thereon. Then, the nitridized wafers are transferred into a conventional nitride furnace where the thin Si3 N4 layers may be increased in thickness by a desired amount. Typically, the initial or first Si3 N4 layer thickness will be about 10-30 angstroms and the second Si3 N4 layer will be on the order of 80 angstroms or more to form a composite Si3 N4 layer of about 100-150 angstroms in total thickness. This novel process and the high dielectric constant integrated circuit capacitors produced thereby are highly useful in the manufacture of certain very large scale integrated circuit (VLSI) components such as dynamic random access memories and the like.

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