U.S. patents available from 1976 to present.
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Semiconductor device using MIS capacitor

Patent 5018000 Issued on May 21, 1991. Estimated Expiration Date: Icon_subject June 16, 2009. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.

Patent References

3539880

Semiconductor integrated amplifier
Patent #: 4247826
Issued on: 01/27/1981
Inventor: Gappa ,   et al.

High-speed logic circuit with a constant current source arrangement
Patent #: 4609837
Issued on: 09/02/1986
Inventor: Yagyuu ,   et al.

High-gain semiconductor device with capacitive coupling
Patent #: 4633291
Issued on: 12/30/1986
Inventor: Koyama

Input buffer circuit and logic circuit using the buffer circuit
Patent #: 4725744
Issued on: 02/16/1988
Inventor: Yagyuu ,   et al.

Thyristor having controllable emitter-base shorts Patent #: 4760432
Issued on: 07/26/1988
Inventor: Stoisiek ,   et al.

Inventors

Assignee

Application

No. 367046 filed on 06/16/1989

US Classes:

257/532, Including capacitor component257/577, Including additional component in same, non-isolated structure (e.g., transistor with diode, transistor with resistor, etc.)257/659, WITH SHIELDING (E.G., ELECTRICAL OR MAGNETIC SHIELDING, OR FROM ELECTROMAGNETIC RADIATION OR CHARGED PARTICLES)257/E27.019, Bipolar transistor in combination with diode, capacitor, or resistor (EPO)326/126, Emitter-coupled or emitter-follower logic327/187External effect device (e.g., light, heat, magnetic, or mechanical force sensitive devices, etc.)

Examiners

Primary: James, Andrew J.
Assistant: Deal, Cynthia S.

Attorney, Agent or Firm

Foreign Patent References

  • 60-91721 JP 05/25/1985
  • 61-169015 JP 07/25/1986
  • 63-166256 JP 12/25/1986
  • 62-105528 JP 05/25/1987
  • 62-111459 JP 05/25/1987
  • 0142918 JP 02/25/1989
  • 2079535 GB 01/25/1982

International Classes

H01L 027/02
H01L 029/92
H01L 029/68
H01L 029/78

Foreign Application Priority Data

1988-06-24 JP

Abstract

A MIS capacitor to be implemented in a semiconductor device employing various or predetermined circuits, has a dielectric side electrode which is in contact with a buried layer provided on a semiconductor substrate through a dielectric film and a buried layer-side electrode connected to the buried layer. The buried layer-side electrode of the MIS capacitor is connected to a low-impedance side of the circuit employed therewith. This structure, when connected as such, is capable of reducing the influence of noise attributed to an ଱-ray and thereby operating the circuit stably. The semiconductor device using a MIS capacitor invention is adaptable to an emitter follower circuit and various logic circuits for preventing malfunction resulting from ଱-ray radiation.

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