Implementation of surface sensitive semiconductor devices
Composite metal and polysilicon field plate structure for high voltage semiconductor devices
Planar structure for high voltage semiconductor devices with gaps in glassy layer over high field regions
Planar type semiconductor device with a high breakdown voltage Patent #: 4567502
ApplicationNo. 364624 filed on 06/09/1989
US Classes:257/330, Gate electrode in groove257/409, With means to increase breakdown voltage (e.g., field shield electrode, guard ring, etc.)257/E29.009With field relief electrode (field plate) (EPO)
ExaminersPrimary: Larkins, William D.
Assistant: Monin, D.
Foreign Patent References
International ClassH01L 029/40
Foreign Application Priority Data1988-06-16 KR
AbstractA semiconductor device having a grooved field plate(s), a grooved field limiting ring(s) or a combination of a grooved field plate(s) and grooved field limiting ring(s) is disclosed. The grooved modification of the conventional semiconductor results in an increased break-down voltage over the conventional semiconductor device. A method for manufacturing the grooved semiconductor device is disclosed.