Dual bus system
January 1, 2008. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.Patent ReferencesDrive for connection to multiple controllers in a digital data secondary storage facility Method and apparatus for controlling a multiprocessor system Multiprocessor system for automatic switching of telegraphic lines Secondary storage facility for connecting to a digital data processing system by separate control information and data transfer paths Data processing system using a high speed data channel for providing direct memory access for block data transfers Extended memory system and method Balancing data-processing work loads High performance microprocessor system Data processing machine with improved cache memory management Bus sourcing and shifter control of a central processing unit InventorsAssigneeApplicationNo. 113418 filed on 10/23/1987US Classes:710/107Bus access regulationExaminersPrimary: Clark, David L.Attorney, Agent or FirmInternational ClassG06F 013/00AbstractThe data processing system, has at least one memory unit operatively connected to a memory bus, and further has an input/output (I/O) bus controller for interfacing at least one peripheral device to the data processing system. The data processing system comprises a first bus which provides a first transmission medium between the peripheral device and the memory bus. A second bus, provides a second transmission medium between a CPU and the memory bus. A logic element, interposed between the first and second bus, and the memory bus, interfaces the first and second bus to the memory bus in response to request signals from the first and second bus.Other References
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