Hardware mechanism for automatically detecting hot-spot references and diverting same from memory traffic in a multiprocessor computer system
April 26, 2008. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.Patent ReferencesParallel access computer memory system employing a power-of-two memory modules Tightly coupled multiple instruction multiple data computer system Message routing in a computer network Shared memory computer method and apparatus Arrangement for routing data packets through a circuit switch Direct parallel path for storage accesses unloading common system path Nonblocking self-routing packet and circuit switching network Shared memory computer method and apparatus Digital computer with cache capable of concurrently handling multiple accesses from parallel processors Patent #: 4794521 InventorsApplicationNo. 186327 filed on 04/26/1988US Classes:709/241, Least weight routing711/108Content addressable memory (CAM)ExaminersPrimary: Zache, Raulfe B.Attorney, Agent or FirmInternational ClassG06F 015/16AbstractAn interconnection network management architecture for use with a large shared memory multiprocessor computing system including a plurality of processors and a plurality of separately addressable main memory modules. Two parallel, interconnection networks are provided each capable of interconnecting any processor to any memory module, and each having different latency characteristics. A Hot-Spot detection mechnaism is associated with each main memory module for detecting when a particular address in that module has become a Hot Spot and includes a first memory for storing all detected Hot Spots. A diverter element is associated with each processor for selectively routing memory requests over either the first or second memory network contingent on its status as a Hot Spot. A second memory is included in each diverter element for storing all Hot Spots detected by the detector elements. A control mechanism determines if any current main memory address is a listed Hot Spot within the second memory and, if so, causes the main memory reference to be transmitted to the memory system over a selected interconnection network. Another component of this mechanism determines if a particular address has been accessed a sufficient number of times within a given timeframe to be deemed a Hot Spot and removes Hot Spots from both the first and second memories when necessary.Other References
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