Patent ReferencesMemory device Dynamic semiconductor memory device with balanced sensing arrangement Semiconductor memory device Dynamic memory device Dynamic RAM with active pull-up circuit Dynamic ram having folded bit line structure Semiconductor memory having divided bit lines and individual sense amplifiers Patent #: 4803663 InventorsAssigneeApplicationNo. 287447 filed on 12/20/1988US Classes:365/207, Differential sensing365/189.04, Simultaneous operations (e.g., read/write)365/203, Precharge365/210, Reference or dummy element365/230.01ADDRESSINGExaminersPrimary: Fears, Terrell W.Attorney, Agent or FirmInternational ClassG11C 013/00Foreign Application Priority Data1987-12-25 JPAbstractA folded line DRAM having shared sense amplifiers wherein one of two the memory cell arrays is provided with a pair of switches for dividing the bit line pairs into plural bit line pair groups and the second memory cell array is provided with separate switches connected in series the bit line pairs for the purpose of reducing power consumption caused by charging and discharging of the bit lines during accessing. | |