High-power semiconductive devices
Electrical package for LSI devices and assembly process therefor
ApplicationNo. 887129 filed on 07/17/1986
US Classes:257/690, With contact or lead257/773, Of specified configuration257/E23.01, Arrangements for conducting electric current to or from solid-state body in operation, e.g., leads, terminal arrangements (EPO)257/E23.011, Internal lead connections, e.g., via connections, feedthrough structures (EPO)257/E25.013Stacked arrangements of devices (EPO)
ExaminersPrimary: Tarcza, Thomas H.
Assistant: Sotomayor, John B.
Attorney, Agent or Firm
International ClassesH01L 023/48
AbstractA wafer array comprising a plurality of wafers of semiconductor material are stacked one on top of another. Through holes are provided in the wafers and electrically conductive liquid is inserted in the through holes for interconnecting all of the wafers. The conductive liquid is electrically insulated from all parts of the wafers except a part comprising an electrically conductive bonding pad which provides an electrical path between the conductive liquid and transistors located in the wafers. The wafers, which are disposed in a stack one on top of the other, are mounted in an enclosure and coupled to electrical pin members for connection to external devices.