U.S. patents available from 1976 to present.
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Etching method for generating apertured openings or trenches in layers or substrates composed of n-doped silicon

Patent 4874484 Issued on October 17, 1989. Estimated Expiration Date: Icon_subject May 13, 2008. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.

Patent References

3471922

3661741

3801390

3846167

Process for forming apertures in silicon bodies
Patent #: 3962052
Issued on: 06/08/1976
Inventor: Abbas ,   et al.

Large value capacitor
Patent #: 3962713
Issued on: 06/08/1976
Inventor: Kendall ,   et al.

Anodic etching method for the detection of electrically active defects in silicon
Patent #: 4180439
Issued on: 12/25/1979
Inventor: Deines ,   et al.

Photoelectrochemical etching of n-type silicon
Patent #: 4482443
Issued on: 11/13/1984
Inventor: Bacon ,   et al.

Method for obtaining full oxide isolation of epitaxial islands in silicon utilizing selective oxidation of porous silicon
Patent #: 4628591
Issued on: 12/16/1986
Inventor: Zorinsky ,   et al.

Fabrication of cleaved semiconductor lasers Patent #: 4689125
Issued on: 08/25/1987
Inventor: Burrus, Jr. ,   et al.

Inventors

Assignee

Application

No. 193760 filed on 05/13/1988

US Classes:

438/750, To same side of substrate205/655, With irradiation or illumination257/E21.216Electrolytic etching (EPO)

Examiners

Primary: Valentine, Donald R.

Attorney, Agent or Firm

Foreign Patent References

  • 18556 EP. 11/20/1980
  • 45446 EP. 02/20/1982
  • 106477 EP. 04/20/1984
  • 178387 EP. 04/20/1986
  • 1421973 DE. 11/20/1968
  • 1901388 DE. 09/20/1969
  • 1548079 FR. 11/20/1968
  • 2339953 FR. 08/20/1977
  • 1487849 GB. 10/20/1977

International Class

C25F 003/12

Foreign Application Priority Data

1987-05-27 DE

Abstract

The present invention provides the production of apertured openings or trenches in layers or substrates composed of n-doped silicon proceeding in an electrolytic way, whereby the silicon is connected as a positively polarized electrode of an electrolysis cell containing an agent that contains hydrofluoric acid. Hole structures having highly variable cross-section can be reproducibly manufactured with the method of the invention and holes can be localized by prescribing nuclei. The invention can be used in the manufacture of trench cells in memory modules, insulating trenches in LSI semiconductor circuits, large-area capacitors (varicaps), and in contacting more deeply disposed layers in disconnectable and voltage-controlled thyristors.

Other References

  • Nicky Chau-Chun Lu et al., A Substrate-Plate Trench-Capacitor (SPT) Memory Cell for Dynamic RAM's, IEEE Journal of Solid-State Circuits, vol. SC-21 No. 5, Oct. 1986
  • T. Morie et al., Depletion Trench Capacitor Technology for Megabit Level MOS dRAM, IEEE Electron Device Letters, vol. EDL-4, No. 11, Nov. 1983, pp. 411-414
  • H. J. Hoffmann et al., Photo-Enhanced Etching of n-Si, Appl. Phys. A 33, pp. 243-245 (1984
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