Image correlation system
December 17, 2007. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.Patent ReferencesPattern recognition system operating by the multiple similarity method Memory system handling a plurality of bits as a unit to be processed Parallel pipeline image processor High speed correlation circuit and method Pattern features extracting apparatus and method Memory system handling a plurality of bits as a unit to be processed Memory pack addressing system Computer memory system with integrated parallel shift circuits Patent #: 4644503 InventorApplicationNo. 07/134590 filed on 12/17/1987US Classes:382/216, At multiple image orientations or positions365/239, Sequential382/218, Comparator382/278, Correlation708/424Multidimensional dataExaminersPrimary: Boudreau, Leo H.Attorney, Agent or FirmInternational ClassesG06K 9/64 (20060101)G06F 17/15 (20060101) AbstractA method and apparatus for controlling a parallel combination of correlation circuits which compare image pixels. A number of correlation circuits are provided, each having its own memory. The memories are loaded with image data with each memory being assigned a different block (region) of the image. Each memory is also loaded with an overlapping portion of an adjacent block so that a pattern can be stepped across the entire block, including a match of the first column of the pattern with the last column of the block. The loading is done by generating addresses corresponding to addresses for the source image with one or more of the most significant bits modified so that the address sequence received by the second and subsequent memories are identical to the address sequence received by the first memory. This allows the various blocks of the image in the different memories to be later simulataneously accessed in parallel using a single address sequence. | |
