U.S. patents available from 1976 to present.
U.S. patent applications available from 2005 to present.

High frequency test head using electro-optics

Patent 4862075 Issued on August 29, 1989. Estimated Expiration Date: Icon_subject September 1, 2008. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.

Patent References

Voltage and electric field measuring device using light
Patent #: 4465969
Issued on: 08/14/1984
Inventor: Tada ,   et al.

Fiber optic magnetic field sensor
Patent #: 4554449
Issued on: 11/19/1985
Inventor: Taniuchi ,   et al.

X-Y Stage for a patterned wafer automatic inspection system Patent #: 4556317
Issued on: 12/03/1985
Inventor: Sandland ,   et al.

Inventors

Application

No. 07/240016 filed on 09/01/1988

US Classes:

324/753, Using electro-optic device324/96Using radiant energy

Examiners

Primary: Eisenzopf, Reinhard J.
Assistant: Nguyen, Viet Q.

Attorney, Agent or Firm

International Classes

G01R 1/07 (20060101)
G01R 1/067 (20060101)
G01R 1/073 (20060101)
G01R 13/34 (20060101)
G01R 13/22 (20060101)
G01R 31/28 (20060101)
G01R 31/309 (20060101)
G01R 31/26 (20060101)
G01R 31/265 (20060101)
G01R 31/308 (20060101)

Abstract

A high speed test system for performing tests on various electrical devices including integrated circuits and semiconductor wafers at device operating speeds in the Gigahertz range. The test system including a test head having a test platform for receiving an adapter board that holds the device under test. The test platform is exposed on one side of the test head to facilitate readily changing the tested devices and easy coupling with conventional wafer prober machines. A plurality of pin driver boards are positioned radially about the test platform to minimize the distance between the device under test and the pin driver boards. Electrical signals presented at specific locations on the device under test are measured in response to the inputted signals form the pin drivers using an electro-optic sensor preferably located central of the pin driver boards and within 1.0 cm of the device under test to minimize pin capacitance. A cooling system is provided to maintain the pin drivers at a substantially constant temperature during operation to minimize pin driver timing drift. An optical system directs light towards the electro-optic sensor through an optical path located centrally of the pin driver boards.

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