Process for forming lightly-doped-drain (LDD) without extra masking steps
Patent 4843023 Issued on June 27, 1989. Estimated Expiration Date: June 30, 2007. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.
438/231, Plural doping steps257/344, With lightly doped portion of drain region adjacent channel (e.g., LDD structure)257/374, Dielectric isolation means (e.g., dielectric layer in vertical grooves)257/E21.038, Characterized by process involved to create mask, e.g., lift-off mask, sidewalls, or to modify mask, such as pre-treatment, post-treatment (EPO)257/E21.64, With particular manufacturing method of gate sidewall spacers, e.g., double spacers, particular spacer material or shape (EPO)257/E29.255, With field effect produced by insulated gate (EPO)438/305Plural doping steps
A new lightly doped drain (LDD) process which does not required extra masking steps as compared to the conventional CMOS process is presented. By employing a new two layer side wall spacer technology, the LDD ion implantation for n-channel and p-channel devices can be carried out by sharing the n+ or p+ source and drain ion implantation mask. This approach provides maximum flexibility in designing optimum n- and p- channel LDD MOSFETs without using any additional mask steps other than the conventional CMOS mask levels. This process is also compatible with self-aligned silicide process.
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June 30, 2007. Estimated Expiration Date is calculated based on simple USPTO term provisions. It does not account for terminal disclaimers, term adjustments, failure to pay maintenance fees, or other factors which might affect the term of a patent.
